1. Technical Field of the Invention
The present invention relates to a method of etching a conductive layer including at least one of tantalum and tantalum nitride. In particular, it relates to a method of etching a metal including at least any one of tantalum and tantalum nitride to form a metal gate.
2. Related Art
In an insulated gate type field effect transistor (MISFET) currently used in a semiconductor integrated circuit, a polycrystalline silicon layer doped with high-density impurity for lower register is used as a gate electrode. However, it is well known that, even if a polycrystalline silicon layer constituting a gate electrode is doped with high-density impurity, an area in the side of an insulated layer of a gate is depleted at the time of channel inversion. If such depletion is occurred, this becomes equivalent to connecting a capacitance to a gate electrode in series such that effective potential applied to a channel is decreased. As a result, the capability of the driving current of MISFET is decreased. In order to overcome this problem a metal is used as a gate electrode material, which has a low resistance and prevents a gate from being depleted.
Japanese Patent Laid-Open No. 11-168212 discloses a method in which tantalum is used as a metal gate electrode. Further, this document discloses that the gate electrode is formed by anisotropic-etching the tantalum film with SiCl4 plasma (the paragraph 0015). However, the present inventor confirmed that, when tantalum film is anisotropic-etched by only SiCl4, some parts of it remained on a substrate without being etched uniformly so as to take longer time to etch them completely.
In addition, the Japanese Patent Laid-Open No. 2002-83805 discloses that a refractory metal layer or a layer alloyed with these metals is etched by a chlorine group gas and a fluorine group gas to form a gate electrode. In this technique, a sidewall of a gate electrode is tapered by etching. A cross-sectional shape of the tapered gate electrode has a lower portion having a width that is larger than that of an upper portion. In addition, in this technique, a tapered gate electrode is used as a mask such that an impurity is doped with self-alignment (the paragraph 0028). Furthermore, in this technique, a combination of Cl2 with CF4 (the table 1 in the paragraph 0065) or a combination of Cl2 with SF4 (the table 2 of the paragraph 0103) is employed as gas for dry etching. This reference also teaches to use a chlorine gas such as SiCl4 and a fluorine gas such as NF3 in a fourth dry etching step. However, this technique is directed to process a gate electrode to be tapered such that it is impossible to process a sidewall of a gate electrode to be vertical or nearly vertical.
Furthermore, the Japanese Patent Laid-Open No. 5-102090 discloses that a metal layer such as aluminum is etched by using etching materials including coating compositions and chemical etching components. In this technique, a sidewall of a metal layer is processed to be vertical or tapered. The cross-sectional shape of a tapered gate electrode has a lower portion having a width that is larger than that of a upper portion. (FIG. 3, FIG. 4 and others). This technique allows a metal being processed as tapered. However there is no detail description of forming a vertical sidewall of a metal layer under necessary conditions. Furthermore, there is no description of forming a vertical sidewall of a metal layer including at least tantalum and tantalum nitride.